MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 6 XGATE (S12XGATEV2)
6.3.1.7
XGATE Condition Code Register (XGCCR)
The XGCCR register (Figure
6-9)
provides access to the RISC core’s condition code register.
7
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
0
0
0
XGN
0
XGZ
0
XGV
0
XGC
0
= Unimplemented or Reserved
Figure 6-9. XGATE Condition Code Register (XGCCR)
Read: In debug mode if unsecured
Write: In debug mode if unsecured
Table 6-7. XGCCR Field Descriptions
Field
3
XGN
2
XGZ
1
XGV
0
XGC
Sign Flag
— The RISC core’s Sign flag
Zero Flag
— The RISC core’s Zero flag
Overflow Flag
— The RISC core’s Overflow flag
Carry Flag
— The RISC core’s Carry flag
Description
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
197