MC9S12XDP512CFU
| Model | MC9S12XDP512CFU |
| Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
| PDF file | Total 1348 pages (File size: 8M) |
| Chip Manufacturer | PHILIPS |
This register configures whether a pull-up or a pull-down device is activated, if the port is used as
input or as wired-OR output. This bit has no effect if the port is used as push-pull output. Out of
reset a pull-up device is enabled.
Table 23-54. PERJ Field Descriptions
Field
7–0
PERJ[7:4]
PERJ[2:0]
Description
Pull Device Enable Port J
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
23.0.5.59 Port J Polarity Select Register (PPSJ)
7
6
5
4
3
2
1
0
R
PPSJ7
W
Reset
0
0
0
0
PPSJ6
PPSJ5
PPSJ4
0
PPSJ2
0
0
PPSJ1
0
PPSJ0
0
= Unimplemented or Reserved
Figure 23-61. Port J Polarity Select Register (PPSJ)
Read: Anytime.
Write: Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as
selecting a pull-up or pull-down device if enabled.
Table 23-55. PPSJ Field Descriptions
Field
7–0
PPSJ[7:4]
PPSJ[2:0]
Description
Polarity Select Port J
0 Falling edge on the associated port J pin sets the associated flag bit in the PIFJ register.
A pull-up device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as general purpose input or as IIC port.
1 Rising edge on the associated port J pin sets the associated flag bit in the PIFJ register.
A pull-down device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as input.
23.0.5.60 Port J Interrupt Enable Register (PIEJ)
7
6
5
4
3
2
1
0
R
PIEJ7
W
Reset
0
0
0
0
PIEJ6
PIEJ5
PIEJ4
0
PIEJ2
0
0
PIEJ1
0
PIEJ0
0
= Unimplemented or Reserved
Figure 23-62. Port J Interrupt Enable Register (PIEJ)
