MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Table 24-50. PERJ Field Descriptions
Field
7–0
PERJ[7:6]
PERJ[1:0]
Description
Pull Device Enable Port J
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
24.0.5.55 Port J Polarity Select Register (PPSJ)
7
6
5
4
3
2
1
0
R
PPSJ7
W
Reset
0
0
PPSJ6
0
0
0
0
PPSJ1
PPSJ0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 24-57. Port J Polarity Select Register (PPSJ)
Read: Anytime.
Write: Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as
selecting a pull-up or pull-down device if enabled.
Table 24-51. PPSJ Field Descriptions
Field
7–0
PPSJ[7:6]
PPSJ[1:0]
Description
Polarity Select Port J
0 Falling edge on the associated port J pin sets the associated flag bit in the PIFJ register.
A pull-up device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as general purpose input or as IIC port.
1 Rising edge on the associated port J pin sets the associated flag bit in the PIFJ register.
A pull-down device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as input.
24.0.5.56 Port J Interrupt Enable Register (PIEJ)
7
6
5
4
3
2
1
0
R
PIEJ7
W
Reset
0
0
PIEJ6
0
0
0
0
PIEJ1
PIEJ0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 24-58. Port J Interrupt Enable Register (PIEJ)
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated
with Port J.