MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
24.0.5.53 Port J Reduced Drive Register (RDRJ)
7
6
5
4
3
2
1
0
R
RDRJ7
W
Reset
0
0
RDRJ6
0
0
0
0
RDRJ1
RDRJ0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 24-55. Port J Reduced Drive Register (RDRJ)
Read: Anytime.
Write: Anytime.
This register configures the drive strength of each port J output pin as either full or reduced. If the port is
used as input this bit is ignored.
Table 24-49. RDRJ Field Descriptions
Field
7–0
RDRJ[7:6]
RDRJ[1:0]
Description
Reduced Drive Port J
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
24.0.5.54 Port J Pull Device Enable Register (PERJ)
7
6
5
4
3
2
1
0
R
PERJ7
W
Reset
1
1
PERJ6
0
0
0
0
PERJ1
PERJ0
1
0
0
0
0
1
= Unimplemented or Reserved
Figure 24-56. Port J Pull Device Enable Register (PERJ)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as wired-OR output. This bit has no effect if the port is used as push-pull output. Out of reset a pull-up
device is enabled.
MC9S12XDP512 Data Sheet, Rev. 2.21
1022
Freescale Semiconductor