MC9S12XDP512CFU
| Model | MC9S12XDP512CFU |
| Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
| PDF file | Total 1348 pages (File size: 8M) |
| Chip Manufacturer | PHILIPS |
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
7
6
5
4
3
2
1
0
R
ID6
W
Reset:
x
x
x
x
x
x
x
x
ID5
ID4
ID3
ID2
ID1
ID0
RTR
Figure 10-29. Identifier Register 3 (IDR3) — Extended Identifier Mapping
Table 10-28. IDR3 Register Field Descriptions — Extended
Field
7:1
ID[6:0]
0
RTR
Description
Extended Format Identifier —
The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Remote Transmission Request
— This flag reflects the status of the remote transmission request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
10.3.3.1.2
IDR0–IDR3 for Standard Identifier Mapping
7
6
5
4
3
2
1
0
R
ID10
W
Reset:
x
x
x
x
x
x
x
x
ID9
ID8
ID7
ID6
ID5
ID4
ID3
Figure 10-30. Identifier Register 0 — Standard Mapping
Table 10-29. IDR0 Register Field Descriptions — Standard
Field
7:0
ID[10:3]
Description
Standard Format Identifier —
The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Table 10-30.
7
6
5
4
3
2
1
0
R
ID2
W
Reset:
x
x
x
x
x
x
x
x
ID1
ID0
RTR
IDE (=0)
= Unused; always read ‘x’
Figure 10-31. Identifier Register 1 — Standard Mapping
MC9S12XDP512 Data Sheet, Rev. 2.21
452
Freescale Semiconductor
