MC9S12XDP512CFU
| Model | MC9S12XDP512CFU |
| Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
| PDF file | Total 1348 pages (File size: 8M) |
| Chip Manufacturer | PHILIPS |
Chapter 15 Background Debug Module (S12XBDMV2)
compared to the serial communication rate. This protocol allows a great flexibility for the POD designers,
since it does not rely on any accurate time measurement or short response time to any event in the serial
communication.
BDM Clock
(Target MCU)
16 Cycles
Target
Transmits
ACK Pulse
High-Impedance
32 Cycles
Speedup Pulse
Minimum Delay
From the BDM Command
BKGD Pin
Earliest
Start of
Next Bit
High-Impedance
16th Tick of the
Last Command Bit
Figure 15-11. Target Acknowledge Pulse (ACK)
NOTE
If the ACK pulse was issued by the target, the host assumes the previous
command was executed. If the CPU enters wait or stop prior to executing a
hardware command, the ACK pulse will not be issued meaning that the
BDM command was not executed. After entering wait or stop mode, the
BDM command is no longer pending.
Figure 15-12
shows the ACK handshake protocol in a command level timing diagram. The READ_BYTE
instruction is used as an example. First, the 8-bit instruction opcode is sent by the host, followed by the
(free or stolen) by the BDM and it executes the READ_BYTE operation. Having retrieved the data, the
BDM issues an ACK pulse to the host controller, indicating that the addressed byte is ready to be retrieved.
After detecting the ACK pulse, the host initiates the byte retrieval process. Note that data is sent in the form
of a word and the host needs to determine which is the appropriate byte based on whether the address was
odd or even.
Target
BKGD Pin READ_BYTE
Host
Byte Address
Target
Host
New BDM
Command
Host
BDM Issues the
ACK Pulse (out of scale)
BDM Executes the
READ_BYTE Command
Target
(2) Bytes are
Retrieved
BDM Decodes
the Command
Figure 15-12. Handshake Protocol at Command Level
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
587
