MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 1 Device Overview MC9S12XD-Family
1.2.2
Signal Properties Summary
Table 1-7
summarizes the pin functionality of the MC9S12XDP512. For available modules on other parts
of the S12XD, S12XB and S12XA family please refer to
Appendix E Derivative Differences.
Table 1-7. Signal Properties Summary (Sheet 1 of 4)
Pin
Pin
Pin
Pin
Pin
Power
Name
Name
Name
Name
Name
Supply
Function 1 Function 2 Function 3 Function 4 Function 5
EXTAL
XTAL
RESET
TEST
VREGEN
XFC
BKGD
PAD[23:08]
—
—
—
—
—
—
MODC
AN[23:8]
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
DDPLL
V
DDPLL
V
DDR
N.A.
V
DDX
V
DDPLL
V
DDX
V
DDA
Internal Pull
Resistor
Description
CTRL
NA
NA
PULLUP
RESET pin
PUCR
NA
Always on
PER0/
PER1
PER1
Up
NA
Up
Reset
State
NA
NA
External reset
Voltage regulator enable
Input
PLL loop filter
Background debug
DOWN Test input
Oscillator pins
Disabled Port AD I/O, Port AD inputs
of ATD1 and
analog inputs of ATD1
Disabled Port AD I/O, Port AD inputs
of ATD0 and
analog inputs of ATD0
Disabled Port A I/O
Disabled Port BI/O
Disabled Port A I/O, address bus,
internal visibility data
Disabled Port B I/O, address bus,
internal visibility data
Disabled Port B I/O, address bus,
upper data strobe
Disabled Port C I/O, data bus
Disabled Port D I/O, data bus
Up
Port E I/O, system clock
output, clock select
Port E I/O, tag high, mode
input
Port E I/O, read enable,
mode input, tag low input
Port E I/O, bus clock output
Port E I/O, low byte data
strobe, EROMON control
Port E I/O, read/write
Port E Input, maskable
interrupt
PAD[07:00]
AN[7:0]
—
—
—
V
DDA
PA[7:0]
PB[7:0]
PA[7:0]
PB[7:1]
PB0
PC[7:0]
PD[7:0]
PE7
PE6
PE5
PE4
PE3
PE2
PE1
—
—
—
—
—
—
—
—
—
—
—
—
V
DDR
V
DDR
V
DDR
V
DDR
V
DDR
PUCR
PUCR
PUCR
PUCR
PUCR
PUCR
PUCR
PUCR
ADDR[15:8] IVD[15:8]
ADDR[7:1]
ADDR0
DATA[15:8]
DATA[7:0]
ECLKX2
TAGHI
RE
ECLK
LSTRB
R/W
IRQ
IVD[7:0]
UDS
—
—
XCLKS
MODB
MODA
—
LDS
WE
—
—
—
—
—
TAGLO
—
EROMCTL
—
—
—
—
—
—
—
—
—
—
—
V
DDR
V
DDR
V
DDR
V
DDR
V
DDR
V
DDR
V
DDR
V
DDR
V
DDR
While RESET
pin is low: down
While RESET
pin is low: down
PUCR
PUCR
PUCR
PUCR
Up
Up
Up
Up
MC9S12XDP512 Data Sheet, Rev. 2.21
52
Freescale Semiconductor