MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Appendix G Detailed Register Map
0x0180–0x01BF Freescale Scalable CAN — MSCAN (CAN1) Map (Sheet 3 of 3)
Address
0x019F
0x01A0–
0x01AF
0x01B0–
0x01BF
Name
CAN1IDMR7
R
W
R
W
R
W
Bit 7
AM7
Bit 6
AM6
Bit 5
AM5
Bit 4
AM4
Bit 3
AM3
Bit 2
AM2
Bit 1
AM1
Bit 0
AM0
CAN1RXFG
FOREGROUND RECEIVE BUFFER
(See
Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
FOREGROUND TRANSMIT BUFFER
(See
Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
CAN1TXFG
0x01C0–0x01FF Freescale Scalable CAN — MSCAN (CAN2) Map
Address
0x01C0
0x01C1
0x01C2
0x01C3
0x01C4
0x01C5
0x01C6
0x01C7
0x01C8
0x01C9
0x01CA
0x01CB
0x01CC
0x01CD
0x01CE
0x01CF
0x01D0
Name
CAN2CTL0
Bit 7
Bit 6
RXACT
Bit 5
CSWAI
LOOPB
BRP5
TSEG21
RSTAT1
Bit 4
SYNCH
Bit 3
TIME
BORM
BRP3
TSEG13
TSTAT1
Bit 2
WUPE
WUPM
BRP2
TSEG12
TSTAT0
Bit 1
SLPRQ
SLPAK
Bit 0
INITRQ
INITAK
R
RXFRM
W
R
CAN2CTL1
CANE
W
R
CAN2BTR0
SJW1
W
R
CAN2BTR1
SAMP
W
R
CAN2RFLG
WUPIF
W
R
CAN2RIER
WUPIE
W
R
0
CAN2TFLG
W
R
0
CAN2TIER
W
R
0
CAN2TARQ
W
R
0
CAN2TAAK
W
R
0
CAN2TBSEL
W
R
0
CAN2IDAC
W
R
0
Reserved
W
R
0
CAN2MISC
W
R RXERR7
CAN2RXERR
W
R TXERR7
CAN2TXERR
W
R
CAN2IDAR0
AC7
W
CLKSRC
SJW0
TSEG22
CSCIF
CSCIE
0
0
0
0
0
0
0
0
RXERR6
TXERR6
LISTEN
BRP4
TSEG20
RSTAT0
BRP1
TSEG11
OVRIF
OVRIE
TXE1
TXEIE1
ABTRQ1
ABTAK1
BRP0
TSEG10
RXF
RXFIE
TXE0
TXEIE0
ABTRQ0
ABTAK0
RSTATE1
0
0
0
0
0
RSTATE0
0
0
0
0
0
TSTATE1
0
0
0
0
0
0
0
0
RXERR3
TXERR3
TSTATE0
TXE2
TXEIE2
ABTRQ2
ABTAK2
TX2
IDHIT2
0
0
RXERR2
TXERR2
TX1
IDHIT1
0
0
RXERR1
TXERR1
TX0
IDHIT0
0
IDAM1
0
0
RXERR5
TXERR5
IDAM0
0
0
RXERR4
TXERR4
BOHOLD
RXERR0
TXERR0
AC6
AC5
AC4
AC3
AC2
AC1
AC0
MC9S12XDP512 Data Sheet, Rev. 2.21
1332
Freescale Semiconductor