MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.3.2.7
EEPROM Command Register (ECMD)
The ECMD register is the EEPROM command register.
7
6
5
4
3
2
1
0
R
W
Reset
0
CMDB
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 25-11. EEPROM Command Register (ECMD)
All CMDB bits are readable and writable during a command write sequence while bit 7 reads 0 and is not
writable.
Table 25-7. ECMD Field Descriptions
Field
6:0
CMDB[6:0]
Description
EEPROM Command Bits
— Valid EEPROM commands are shown in
Table 25-8.
Writing any command other
than those listed in
Table 25-8
sets the ACCERR flag in the ESTAT register.
Table 25-8. Valid EEPROM Command List
CMDB[6:0]
0x05
0x20
0x40
0x41
0x47
0x60
Command
Erase Verify
Word Program
Sector Erase
Mass Erase
Sector Erase Abort
Sector Modify
25.3.2.8
RESERVED3
This register is reserved for factory testing and is not accessible.
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 25-12. RESERVED3
All bits read 0 and are not writable.
EEPROM Address Registers (EADDR)
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
1049