S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 27
512 KByte Flash Module (S12XFTM512K3V1)
Table 27-1. Revision History
Revision
Number
V01.08
Revision
Date
22 Aug 2007
Sections
Affected
27.4.2.21/27-
1069
- Corrected spec: MDCFAIL4-0 contents
- Corrected spec: Program D-Flash command does not verify erase before
starting
- Corrected spec: Verify Backdoor Access Key command is NOT allowed in
mode ‘SS’
- Corrected spec: ACCERR is set on EEE buffer ram initialization errors
during reset sequence
- Corrected spec: EEE Query command DFPART and ERPART checks result
in MGSTAT[1:0] flags, not ACCERR (Section
V01.09
14 Nov 2007
27.5.2/27-1075
- Changed terminology from ‘word program’ to “Program P-Flash’ in the BDM
unsecuring description,
Section 27.5.2
- Added requirement that user not write any Flash module register during
execution of commands ‘Erase All Blocks’,
Section 27.4.2.8,
Flash’,
27.4.2/27-1050
- Added statement that security is released upon successful completion of
command ‘Erase All Blocks’,
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
V01.10
19 Dec 2007
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
1015
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
