S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 23 Voltage Regulator (S12VREGL3V3V1)
23.3.1
Module Memory Map
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
A summary of the registers associated with the VREG_3V3 sub-block is shown in
Figure 23-2.
Detailed
descriptions of the registers and bits are given in the subsections that follow
Figure 23-2. Register Summary
Address
0x02F0
Name
VREGHTCL
R
W
R
W
Bit 7
0
6
0
5
VSEL
0
4
VAE
0
3
HTEN
0
2
HTDS
1
HTIE
Bit 0
HTIF
0x02F1
VREGCTRL
0
0
LVDS
LVIE
LVIF
0x02F2
VREGAPIC R
L
W
VREGAPIT R
R
W
VREGAPIR R
H
W
VREGAPIR R
L
W
Reserved
06
VREGHTTR
R
W
R
W
APICLK
0
0
APIFES
APIEA
APIFE
APIE
0
APIF
0
0x02F3
APITR5
APITR4
APITR3
APITR2
APITR1
APITR0
0x02F4
APIR15
APIR14
APIR13
APIR12
APIR11
APIR10
APIR9
APIR8
0x02F5
APIR7
0
APIR6
0
APIR5
0
APIR4
0
APIR3
0
APIR2
0
APIR1
0
APIR0
0
0x02F6
0x02F7
HTOEN
0
0
0
HTTR3
HTTR2
HTTR1
HTTR0
23.3.2
Register Descriptions
This section describes all the VREG_3V3 registers and their individual bits.
23.3.2.1
0x02F0
H
igh
T
emperature
Control Register (VREGHTCL)
The VREGHTCL register allows to configure the VREG temperature sense features.
7
6
5
4
3
2
1
0
R
W
Reset
0
0
VSEL
VAE
1
HTEN
0
HTDS
HTIE
0
0
HTIF
0
0
0
0
= Unimplemented or Reserved
MC9S12XE-Family Reference Manual , Rev. 1.19
820
Freescale Semiconductor