S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
Table 25-61. Valid Set Field Margin Level Settings
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
CCOB
(CCOBIX=001)
0x0002
0x0003
Level Description
User Margin-0 Level
(2)
Field Margin-1 Level
1
0x0004
Field Margin-0 Level
2
1. Read margin to the erased state
2. Read margin to the programmed state
Table 25-62. Set Field Margin Level Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
ACCERR
FSTAT
Set if an invalid margin level setting is supplied
FPVIOL
MGSTAT1
MGSTAT0
FERSTAT
EPVIOLIF
None
None
None
None
Set if command not available in current mode (see
Table 25-30)
Set if an invalid global address [22:16] is supplied
CAUTION
Field margin levels must only be used during verify of the initial factory
programming.
NOTE
Field margin levels can be used to check that Flash memory contents have
adequate margin for data retention at the normal level setting. If unexpected
results are encountered when checking Flash memory contents at field
margin levels, the Flash memory contents should be erased and
reprogrammed.
MC9S12XE-Family Reference Manual , Rev. 1.19
940
Freescale Semiconductor