S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 2 Port Integration Module (S12XEP100PIMV1)
Most I/O pins can be configured by register bits to select data direction and drive strength, to enable and
select pull-up or pull-down devices.
NOTE
This document assumes the availabitity of all features (208-pin package
option). Some functions are not available on lower pin count package
options. Refer to the pin-out summary in the SOC Guide.
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
2.1.2
Features
The Port Integration Module includes these distinctive registers:
• Data and data direction registers for Ports A, B, C, D, E, K, T, S, M, P, H, J, AD0, AD1, R, L, and
F when used as general-purpose I/O
• Control registers to enable/disable pull-device and select pull-ups/pull-downs on Ports T, S, M, P,
H, J, R, L, and F on per-pin basis
• Control registers to enable/disable pull-up devices on Ports AD0 and AD1 on per-pin basis
• Single control register to enable/disable pull-ups on Ports A, B, C, D, E, and K on per-port basis
and on BKGD pin
• Control registers to enable/disable reduced output drive on Ports T, S, M, P, H, J, AD0, AD1, R, L,
and F on per-pin basis
• Single control register to enable/disable reduced output drive on Ports A, B, C, D, E, and K on per-
port basis
• Control registers to enable/disable open-drain (wired-or) mode on Ports S, M, and L
• Interrupt flag register for pin interrupts on Ports P, H, and J
• Control register to configure IRQ pin operation
• Free-running clock outputs
A standard port pin has the following minimum features:
• Input/output selection
• 5V output drive with two selectable drive strengths
• 5V digital and analog input
• Input with selectable pull-up or pull-down device
Optional features supported on dedicated pins:
•
•
•
Open drain for wired-or connections
Interrupt inputs with glitch filtering
Reduced input threshold to support low voltage applications
2.2
External Signal Description
This section lists and describes the signals that do connect off-chip.
MC9S12XE-Family Reference Manual , Rev. 1.19
90
Freescale Semiconductor
