S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 2 Port Integration Module (S12XEP100PIMV1)
Table 2-86. PPSR Register Field Descriptions
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Field
7-0
PPSR
Description
Port R pull device select—Determine
pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
2.3.91
PIM Reserved Register
Access: User read
(1)
6
5
4
3
2
1
0
Address 0x036E
7
R
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-89. PIM Reserved Register
1. Read: Always reads 0x00
Write: Unimplemented
2.3.92
Port R Routing Register (PTRRR)
Access: User read/write
(1)
6
5
4
3
2
1
0
Address 0x036F
7
R
PTRRR7
W
Reset
0
0
0
0
0
0
0
0
PTRRR6
PTRRR5
PTRRR4
PTRRR3
PTRRR2
PTRRR1
PTRRR0
= Unimplemented or Reserved
Figure 2-90. Port R Routing Register (PTRRR)
1. Read: Anytime.
Write: Anytime.
Table 2-87. PTR Routing Register Field Descriptions
Field
7
PTRRR
Description
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC7 is available on PP7
0 TIMIOC7 is available on PR7
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC6 is available on PP6
0 TIMIOC6 is available on PR6
6
PTRRR
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
167
