S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
A.3.1.15
Full Partition D-Flash (FCMD=0x0F)
The maximum time for partitioning the D-flash (ERPART=16, DFPART=0) is given by :
1
1
t part
≈
21800
⋅
------------------------
+
400000
⋅
----------------------------
+
t mass
-
-
f
f
NVMOP
NVMBUS
A.3.1.16
Erase Verify D-Flash Section (FCMD=0x10)
Erase Verify D-Flash for a given number of words N
W
is given by .
t
1
≈ (
840
+
N W
) ⋅
----------------------------
-
check
f
NVMBUS
A.3.1.17
D-Flash Programming (FCMD=0x11)
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary, because programming across a row boundary requires extra steps. The
D-Flash programming time is specified for different cases (1,2,3,4 words and 4 words across a row
boundary) at a 50MHz bus frequency. The typical programming time can be calculated using the following
equation, whereby N
w
denotes the number of words; BC=0 if no boundary is crossed and BC=1 if a
boundary is crossed.
1
1
t
dpgm
=
⎛ (
15
+
(
54
⋅
N
w
)
+
(
16
⋅
BC
) ) ⋅
------------------
⎞
+
⎛ (
460
+
(
640
⋅
N
W
)
+
(
500
⋅
BC
) ) ⋅
---------------------
⎞
-
⎠ ⎝
-
⎝
f
NVMOP
f
NVMBUS
⎠
The maximum programming time can be calculated using the following equation
1
1
t
dpgm
=
⎛ (
15
+
(
56
⋅
N
w
)
+
(
16
⋅
BC
) ) ⋅
------------------
⎞
+
⎛ (
460
+
(
840
⋅
N
W
)
+
(
500
⋅
BC
) ) ⋅
---------------------
⎞
-
⎠ ⎝
-
⎝
f
NVMOP
f
NVMBUS
⎠
A.3.1.18
Erase D-Flash Sector (FCMD=0x12)
Typical D-Flash sector erase times are those expected on a new device, where no margin verify fails occur.
They can be calculated using the following equation.
1
1
t eradf
≈
5025
⋅
------------------------
+
700
⋅
----------------------------
-
-
f NVMBUS
f NVMOP
Maximum D-Fash sector erase times can be calculated using the following equation.
1
1
t eradf
≈
20100
⋅
------------------------
+
3300
⋅
----------------------------
-
-
f NVMBUS
f NVMOP
The D-Flash sector erase time on a new device is ~5ms and can extend to 20ms as the flash is cycled.
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
1227
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
1
t
=
350
⋅
----------------------------
-
f
NVMBUS
