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S912XEG128J2VAL

S912XEG128J2VAL

Model S912XEG128J2VAL
Description IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC
PDF file Total 1327 pages (File size: 7M)
Chip Manufacturer ROCHESTER
Appendix E Detailed Register Address Map
0x00C8–0x00CF Asynchronous Serial Interface (SCI0) Map
R
IREN
W
R
SBR7
W
R
LOOPS
W
R
RXEDGIF
W
R
RXEDGIE
W
R
0
W
R
TIE
W
R
TDRE
W
R
AMAP
W
R
R8
W
R
R7
W
T7
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Address
0x00C8
0x00C9
0x00CA
0x00C8
0x00C9
0x00CA
0x00CB
0x00CC
0x00CD
0x00CE
0x00CF
1
2
Name
SCI0BDH
1
SCI0BDL
1
SCI0CR1
SCI0ASR1
2
SCI0ACR1
2
SCI0ACR2
2
SCI0CR2
SCI0SR1
SCI0SR2
SCI0DRH
SCI0DRL
Bit 7
Bit 6
TNP1
SBR6
SCISWAI
0
0
0
Bit 5
TNP0
SBR5
RSRC
0
0
0
Bit 4
SBR12
SBR4
M
0
0
0
Bit 3
SBR11
SBR3
WAKE
0
0
0
Bit 2
SBR10
SBR2
ILT
BERRV
0
Bit 1
SBR9
SBR1
PE
BERRIF
BERRIE
BERRM0
RWU
FE
Bit 0
SBR8
SBR0
PT
BKDIF
BKDIE
BKDFE
SBK
PF
RAF
0
R0
T0
BERRM1
RE
NF
TCIE
TC
0
RIE
RDRF
0
0
R5
T5
ILIE
IDLE
TE
OR
TXPOL
0
R4
T4
RXPOL
0
R3
T3
BRK13
0
R2
T2
TXDIR
0
R1
T1
T8
R6
T6
Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to zero
Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to one
0x00D0–0x00D7 Asynchronous Serial Interface (SCI1) Map
Address
0x00D0
0x00D1
0x00D2
0x00D0
0x00D1
0x00D2
0x00D3
0x00D4
Name
SCI1BDH
1
SCI1BDL
1
SCI1CR1
1
SCI1ASR1
2
SCI1ACR1
2
SCI1ACR2
2
SCI1CR2
SCI1SR1
Bit 7
R
IREN
W
R
SBR7
W
R
LOOPS
W
R
RXEDGIF
W
R
RXEDGIE
W
R
0
W
R
TIE
W
R
TDRE
W
Bit 6
TNP1
SBR6
SCISWAI
0
0
0
Bit 5
TNP0
SBR5
RSRC
0
0
0
Bit 4
SBR12
SBR4
M
0
0
0
Bit 3
SBR11
SBR3
WAKE
0
0
0
Bit 2
SBR10
SBR2
ILT
BERRV
0
Bit 1
SBR9
SBR1
PE
BERRIF
BERRIE
BERRM0
RWU
FE
Bit 0
SBR8
SBR0
PT
BKDIF
BKDIE
BKDFE
SBK
PF
BERRM1
RE
NF
TCIE
TC
RIE
RDRF
ILIE
IDLE
TE
OR
MC9S12XE-Family Reference Manual , Rev. 1.19
1282
Freescale Semiconductor
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