S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 29 1024 KByte Flash Module (S12XFTM1024K5V2)
return CCIF to 1 and the FCCOB register will be used to communicate any results. The flow for a generic
command write sequence is shown in
Figure 29-26.
START
Read: FCLKDIV register
Clock Register
Written
Check
FDIVLD
Set?
yes
no
Write: FCLKDIV register
Read: FSTAT register
Note: FCLKDIV must be set after
each reset
FCCOB
Availability Check
CCIF
Set?
yes
no
Results from previous Command
yes
Write: FSTAT register
Clear ACCERR/FPVIOL 0x30
Access Error and
Protection Violation
Check
ACCERR/
FPVIOL
Set?
no
Write to FCCOBIX register
to identify specific command
parameter to load.
Write to FCCOB register
to load required command parameter.
More
Parameters?
no
yes
Write: FSTAT register (to launch command)
Clear CCIF 0x80
Read: FSTAT register
Bit Polling for
Command Completion
Check
CCIF Set?
yes
EXIT
no
Figure 29-26. Generic Flash Command Write Sequence Flowchart
MC9S12XE-Family Reference Manual , Rev. 1.19
1172
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages