S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 22 Timer Module (TIM16B8CV2) Block Description
Read: Anytime
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Write: Anytime
Table 22-5. OC7D Field Descriptions
Field
7:0
OC7D[7:0]
Description
Output Compare 7 Data
— A channel 7 output compare can cause bits in the output compare 7 data register
to transfer to the timer port data register depending on the output compare 7 mask register.
22.3.2.5
Timer Count Register (TCNT)
Module Base + 0x0004
15
14
13
12
11
10
9
9
R
TCNT15
W
Reset
0
0
0
0
0
0
0
0
TCNT14
TCNT13
TCNT12
TCNT11
TCNT10
TCNT9
TCNT8
Figure 22-10. Timer Count Register High (TCNTH)
Module Base + 0x0005
7
6
5
4
3
2
1
0
R
TCNT7
W
Reset
0
0
0
0
0
0
0
0
TCNT6
TCNT5
TCNT4
TCNT3
TCNT2
TCNT1
TCNT0
Figure 22-11. Timer Count Register Low (TCNTL)
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
Read: Anytime
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
MC9S12XE-Family Reference Manual , Rev. 1.19
796
Freescale Semiconductor