S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
Table 13-3. Multi-Channel Wrap Around Coding
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
WRAP3 WRAP2 WRAP1 WRAP0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Multiple Channel Conversions (MULT = 1)
Wraparound to AN0 after Converting
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
1
1
1
1
1. If only AN0 should be converted use MULT=0.
13.3.2.2
ATD Control Register 1 (ATDCTL1)
Writes to this register will abort current conversion sequence.
Module Base + 0x0001
7
6
5
4
3
2
1
0
R
ETRIGSEL
W
Reset
0
0
1
0
1
1
1
1
SRES1
SRES0
SMP_DIS
ETRIGCH3
ETRIGCH2
ETRIGCH1
ETRIGCH0
Figure 13-4. ATD Control Register 1 (ATDCTL1)
Read: Anytime
Write: Anytime
Table 13-4. ATDCTL1 Field Descriptions
Field
7
ETRIGSEL
Description
External Trigger Source Select
— This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG3-0 inputs. See device specification for availability and connectivity of ETRIG3-
0 inputs. If a particular ETRIG3-0 input option is not available, writing a 1 to ETRISEL only sets the bit but has
not effect, this means that one of the AD channels (selected by ETRIGCH3-0) is configured as the source for
external trigger. The coding is summarized in
Table 13-6.
A/D Resolution Select
— These bits select the resolution of A/D conversion results. See
Table 13-5
for
coding.
6–5
SRES[1:0]
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
507
