S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 5
External Bus Interface (S12XEBIV4)
Table 5-1. Revision History
Revision
Number
V04.01
V04.02
V04.03
Revision Date
12 Sep 2005
23 May 2006
24 Jul 2006
Sections
Affected
Description of Changes
- Added CSx stretch description.
- Internal updates
- Removed term IVIS
5.1
Introduction
This document describes the functionality of the XEBI block controlling the external bus interface.
The XEBI controls the functionality of a non-multiplexed external bus (a.k.a. ‘expansion bus’) in
relationship with the chip operation modes. Dependent on the mode, the external bus can be used for data
exchange with external memory, peripherals or PRU, and provide visibility to the internal bus externally
in combination with an emulator.
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
241
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages