S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
Table 26-52. Erase P-Flash Sector Command Error Handling
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
ACCERR
Set if command not available in current mode (see
Table 26-30)
Set if an invalid global address [22:16] is supplied
(1)
FSTAT
FPVIOL
MGSTAT1
MGSTAT0
Set if a misaligned phrase address is supplied (global address [2:0] != 000)
Set if the selected P-Flash sector is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
FERSTAT
EPVIOLIF
None
1. As defined by the memory map for FTM512K3.
26.4.2.11 Unsecure Flash Command
The Unsecure Flash command will erase the entire P-Flash and D-Flash memory space and, if the erase is
successful, will release security.
Table 26-53. Unsecure Flash Command FCCOB Requirements
CCOBIX[2:0]
000
0x0B
FCCOB Parameters
Not required
Upon clearing CCIF to launch the Unsecure Flash command, the Memory Controller will erase the entire
P-Flash and D-Flash memory space and verify that it is erased. If the Memory Controller verifies that the
entire Flash memory space was properly erased, security will be released. If the erase verify is not
successful, the Unsecure Flash operation sets MGSTAT1 and terminates without changing the security
state. During the execution of this command (CCIF=0) the user must not write to any Flash module
register. The CCIF flag is set after the Unsecure Flash operation has completed.
Table 26-54. Unsecure Flash Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 000 at command launch
ACCERR
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Table 26-30)
FSTAT
FPVIOL
MGSTAT1
MGSTAT0
FERSTAT
EPVIOLIF
Set if any area of the P-Flash memory is protected
Set if any errors have been encountered during the verify operation
(1)
Set if any non-correctable errors have been encountered during the verify
operation
1
Set if any area of the buffer RAM EEE partition is protected
MC9S12XE-Family Reference Manual , Rev. 1.19
998
Freescale Semiconductor
