S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
TIMCLK (Timer Clock)
CLK1
CLK0
4:1 MUX
Prescaled Clock
(PCLK)
Clock Select
(PAMOD)
PACLK
Edge Detector
P7
Interrupt
8-Bit PAC3
(PACN3)
PACA
8-Bit PAC2
(PACN2)
MUX
Divide by 64
Bus Clock
Interrupt
8-Bit PAC1
(PACN1)
PACB
8-Bit PAC0
(PACN0)
Delay Counter
Edge Detector
P0
Figure 14-71. 16-Bit Pulse Accumulators Block Diagram
16-Bit Main Timer
Px
Edge
Detector
Delay
Counter
TCx Input
Capture Register
Set CxF
Interrupt
TCxH I.C.
Holding Register
BUFEN
•
LATQ
•
TFMOD
Figure 14-72. Block Diagram for Port 7 with Output Compare/Pulse Accumulator A
MC9S12XE-Family Reference Manual , Rev. 1.19
568
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
PACLK / 65536
PACLK / 256