S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
A.3.1.9
Erase P-Flash Block (FCMD=0x09)
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Freescale Semiconductor
Erasing a 256K NVM block takes
1
1
t mass
≈
100100
⋅
------------------------
+
70000
⋅
----------------------------
-
-
f
f
NVMBUS
NVMOP
Erasing a 128K NVM block takes
t
1
1
≈
100100
⋅
------------------------
+
35000
⋅
----------------------------
-
-
mass
f
f
NVMBUS
NVMOP
A.3.1.10
Erase P-Flash Sector (FCMD=0x0A)
The typical time to erase a1024-byte P-Flash sector can be calculated using
1
1
t
era
=
⎛
20020
⋅
------------------
⎞
+
⎛
700
⋅
---------------------
⎞
-
⎠ ⎝
-
⎝
f
NVMBUS
⎠
f
NVMOP
The maximum time to erase a1024-byte P-Flash sector can be calculated using
1
1
t
era
=
⎛
20020
⋅
------------------
⎞
+
⎛
1100
⋅
---------------------
⎞
-
⎠ ⎝
-
⎝
f
NVMBUS
⎠
f
NVMOP
A.3.1.11
Unsecure Flash (FCMD=0x0B)
The maximum time for unsecuring the flash is given by
1
1
t uns
=
⎛
100100
⋅
------------------------
+
70000
⋅
----------------------------
⎞
-
-
⎝
f NVMBUS
⎠
f NVMOP
A.3.1.12
Verify Backdoor Access Key (FCMD=0x0C)
The maximum verify backdoor access key time is given by
1
t
=
400
⋅
----------------------------
-
f NVMBUS
A.3.1.13
Set User Margin Level (FCMD=0x0D)
The maximum set user margin level time is given by
1
t
=
350
⋅
----------------------------
-
f NVMBUS
A.3.1.14
Set Field Margin Level (FCMD=0x0E)
The maximum set field margin level time is given by
MC9S12XE-Family Reference Manual , Rev. 1.19
1226
