S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
•
Program a duplicate ERPART to the EEE nonvolatile information register at global address
0x12_0006 (see
Table 24-7)
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
The D-Flash user partition will start at global address 0x10_0000. The buffer RAM EEE partition will end
at global address 0x13_FFFF. After the Partition D-Flash operation has completed, the CCIF flag will set.
Running the Partition D-Flash command a second time will result in the ACCERR bit within the FSTAT
register being set. The data value written corresponds to the number of 256 byte sectors allocated for either
direct D-Flash access (DFPART) or buffer RAM EEE access (ERPART).
Table 24-76. Partition D-Flash Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see
Table 24-30)
ACCERR
Set if partitions have already been defined
FSTAT
FPVIOL
MGSTAT1
MGSTAT0
Set if an invalid DFPART or ERPART selection is supplied
(1)
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
FERSTAT
EPVIOLIF
None
1. As defined by the maximum ERPART for FTM256K2.
24.4.3
Interrupts
The Flash module can generate an interrupt when a Flash command operation has completed or when a
Flash command operation has detected an EEE error or an ECC fault.
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
885
