S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
Table 28-56. Verify Backdoor Access Key Command Error Handling
Register
FERSTAT
Error Bit
EPVIOLIF
None
Error Condition
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
28.4.2.13 Set User Margin Level Command
The Set User Margin Level command causes the Memory Controller to set the margin level for future read
operations of a specific P-Flash or D-Flash block.
Table 28-57. Set User Margin Level Command FCCOB Requirements
CCOBIX[2:0]
000
001
0x0D
FCCOB Parameters
Global address [22:16] to identify the
Flash block
Margin level setting
Upon clearing CCIF to launch the Set User Margin Level command, the Memory Controller will set the
user margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set User Margin Level command are defined in
Table 28-58.
Table 28-58. Valid Set User Margin Level Settings
CCOB
(CCOBIX=001)
0x0000
0x0001
Level Description
Return to Normal Level
User Margin-1 Level
(1)
0x0002
User Margin-0 Level
(2)
1. Read margin to the erased state
2. Read margin to the programmed state
Table 28-59. Set User Margin Level Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
ACCERR
FSTAT
Set if an invalid margin level setting is supplied
FPVIOL
MGSTAT1
MGSTAT0
None
None
None
Set if command not available in current mode (see
Table 28-30)
Set if an invalid global address [22:16] is supplied
(1)
MC9S12XE-Family Reference Manual , Rev. 1.19
1124
Freescale Semiconductor
