S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 3 Memory Mapping Control (S12XMMCV4)
MCU
No External Bus
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Flash
Figure 3-24. ROM in Single Chip Modes
3.5.3.2
ROM Control in Emulation Single-Chip Mode
In emulation single-chip mode the external bus is connected to the emulator. If the EROMON bit is set,
the internal FLASH provides the data and the emulator can observe all internal CPU actions on the external
bus. If the EROMON bit is cleared, the emulator provides the data (generator) and traces the all CPU
actions (see
Figure 3-25).
Observer
MCU
Emulator
Flash
EROMON = 1
Generator
MCU
Emulator
Flash
EROMON = 0
Figure 3-25. ROM in Emulation Single-Chip Mode
3.5.3.3
ROM Control in Normal Expanded Mode
In normal expanded mode the external bus will be connected to the application. If the ROMON bit is set,
the internal FLASH provides the data. If the ROMON bit is cleared, the application memory provides the
data (see
Figure 3-26).
MC9S12XE-Family Reference Manual , Rev. 1.19
222
Freescale Semiconductor