S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
1
2
3
4
5
6
The number of program/erase cycles for the EEPROM/D-Flash depends upon the partitioning of D-Flash
used for EEPROM Emulation. Defining RAM size allocated for EEE as EEE-RAM and D-Flash partition
allocated to EEE as EEE_NVM, the minimum number of program/erase cycles is specified depending
upon the ratio of EEE_NVM/EEE_RAM. The minimum ratio EEE_NVM/EEE_RAM =8.
Figure A-2. Program/Erase Dependency on D-Flash Partitioning
# K Cycles
(Log)
1,000,000
100,000
10,000
1,000
100
10
10
100
1000
10,000
100,000
20% Spec Cycles
10 Year Data Retention
Spec Cycles
5 Year Data Retention
EEE_NVM/EEE_RAM ratio
(Log)
MC9S12XE-Family Reference Manual , Rev. 1.19
1232
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
T
Javg
does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive
application.
Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please
refer to Engineering Bulletin EB618
T
Javg
does not exceed 85°C in a typical temperature profile over the lifetime of a consumer, industrial or automotive
application.
This represents the number of writes of updated data words to the EEE_RAM partition. Minimum specification (endurance
and data retention) of the Emulated EEPROM array is based on the minimum specification of the D-Flash array per item 6.
This represents the number of writes of updated data words to the EEE_RAM partition. Typical endurance performance for
the Emulated EEPROM array is based on typical endurance performance and the EEE algorithm implemented on this
product family. Spec. table quotes typical endurance evaluated at 25°C for this product family.
This is equivalent to using a single byte or aligned word in the EEE_RAM with 32K D-Flash allocated for EEEPROM
