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S912XEG128J2VAL

S912XEG128J2VAL

Model S912XEG128J2VAL
Description IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC
PDF file Total 1327 pages (File size: 7M)
Chip Manufacturer ROCHESTER
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
Module Base + 0x0007
7
6
5
4
3
2
1
0
R
W
Reset:
0
0
0
0
0
TXEIE2
TXEIE1
0
TXEIE0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-11. MSCAN Transmitter Interrupt Enable Register (CANTIER)
NOTE
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
Read: Anytime
Write: Anytime when not in initialization mode
Table 16-13. CANTIER Register Field Descriptions
Field
2:0
TXEIE[2:0]
Description
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
request.
16.3.2.9
MSCAN Transmitter Message Abort Request Register (CANTARQ)
The CANTARQ register allows abort request of queued messages as described below.
Module Base + 0x0008
7
6
5
4
3
2
1
0
R
W
Reset:
0
0
0
0
0
ABTRQ2
ABTRQ1
0
ABTRQ0
0
0
0
0
0
0
0
= Unimplemented
Figure 16-12. MSCAN Transmitter Message Abort Request Register (CANTARQ)
NOTE
The CANTARQ register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
Read: Anytime
Write: Anytime when not in initialization mode
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
619
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
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