S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 1 Device Overview MC9S12XE-Family
Table 1-10. Signal Properties Summary (Sheet 2 of 4)
Pin
Pin
Pin
Pin
Pin
Power
Name
Name
Name
Name
Name
Supply
Function 1 Function 2 Function 3 Function 4 Function 5
PF2
PF1
PF0
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
PJ7
CS2
CS1
CS0
KWH7
KWH6
KWH5
KWH4
KWH3
KWH2
KWH1
KWH0
KWJ7
—
—
—
SS2
SCK2
MOSI2
MISO2
SS1
SCK1
MOSI1
MISO1
TXCAN4
—
—
—
TXD5
RXD5
TXD4
RXD4
TXD7
RXD7
TXD6
RXD6
SCL0
—
—
—
—
—
—
—
—
—
—
—
TXCAN0
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Internal Pull
Resistor
Description
CTRL
PERF/
PPSF
PERF/
PPSF
PERF/
PPSF
PERH/
PPSH
PERH/
PPSH
PERH/
PPSH
Reset
State
Up
Up
Up
Port F I/O, interrupt, chip
select 2
Port F I/O, interrupt, chip
select 1
Port F I/O, interrupt, chip
select 0
Disabled Port H I/O, interrupt, SS of
SPI2, TXD of SCI5
Disabled Port H I/O, interrupt, SCK of
SPI2, RXD of SCI5
Disabled Port H I/O, interrupt, MOSI
of SPI2, TXD of SCI4
PERH/PPSH Disabled Port H I/O, interrupt, MISO
of SPI2, RXD of SCI4
PERH/PPSH Disabled Port H I/O, interrupt, SS of
SPI1
PERH/PPSH Disabled Port H I/O, interrupt, SCK of
SPI1
PERH/PPSH Disabled Port H I/O, interrupt, MOSI
of SPI1
PERH/PPSH Disabled Port H I/O, interrupt, MISO
of SPI1
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PERJ/
PPSJ
PUCR
Up
Port J I/O, interrupt, TX of
CAN4, SCL of IIC0, TX of
CAN0
Port J I/O, interrupt, RX of
CAN4, SDA of IIC0, RX of
CAN0
Port J I/O, interrupt, SCL of
IIC1, chip select 2
Port J I/O, interrupt, SDA of
IIC1, chip select 0
Port J I/O, interrupt,
Port J I/O, interrupt, chip
select 1
Port J I/O, interrupt, TXD of
SCI2
Port J I/O, interrupt, RXD of
SCI2
Port K I/O, EWAIT input,
ROM on control
PJ6
KWJ6
RXCAN4
SDA0
RXCAN0
V
DDX
Up
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PK7
KWJ5
KWJ4
KWJ3
KWJ2
KWJ1
KWJ0
EWAIT
SCL1
SDA1
—
CS1
TXD2
RXD2
ROMCTL
CS2
CS0
—
—
—
CS3
—
—
—
—
—
—
—
—
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
V
DDX
Up
Up
Up
Up
Up
Up
Up
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
59
