S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 17
Periodic Interrupt Timer (S12PIT24B8CV2)
Table 17-1. Revision History
Revision
Number
V01.00
V01.01
RevisionDate
28 Apr 2005
05 Jul 2005
17.6/17-674
Sections
Affected
- Initial Release.
- Added application section.
- Removed table 1-1.
Description of Changes
17.1
Introduction
The period interrupt timer (PIT) is an array of 24-bit timers that can be used to trigger peripheral modules
or raise periodic interrupts. Refer to
Figure 17-1
for a simplified block diagram.
17.1.1
Glossary
Acronyms and Abbreviations
PIT
ISR
CCR
SoC
Periodic Interrupt Timer
Interrupt Service Routine
Condition Code Register
System on Chip
clock periods of the 16-bit timer modulus down-counters, which are generated by the 8-bit
modulus down-counters.
micro time bases
17.1.2
Features
The PIT includes these features:
• Eight timers implemented as modulus down-counters with independent time-out periods.
• Time-out periods selectable between 1 and 2
24
bus clock cycles. Time-out equals m*n bus clock
cycles with 1 <= m <= 256 and 1 <= n <= 65536.
• Timers that can be enabled individually.
• Eight time-out interrupts.
• Eight time-out trigger output signals available to trigger peripheral modules.
• Start of timer channels can be aligned to each other.
17.1.3
Modes of Operation
Refer to the device overview for a detailed explanation of the chip modes.
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
659
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
