S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 2 Port Integration Module (S12XEP100PIMV1)
Table 2-3. Pin Configuration Summary
DDR
0
0
0
0
0
0
0
1
1
1
1
1
1
1
IO
x
x
x
x
x
x
x
0
1
0
1
0
1
0
RDR
x
x
x
x
x
x
x
0
0
1
1
0
0
1
PE
0
1
1
0
0
1
1
x
x
x
x
x
x
x
PS
(1)
x
0
1
0
1
0
1
x
x
x
x
0
1
0
IE
(2)
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Input
Input
Input
Input
Input
Input
Input
Output, full drive to 0
Output, full drive to 1
Output, reduced drive to 0
Output, reduced drive to 1
Output, full drive to 0
Output, full drive to 1
Output, reduced drive to 0
Output, reduced drive to 1
Function
Pull Device
Disabled
Pull Up
Pull Down
Disabled
Disabled
Pull Up
Pull Down
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Interrupt
Disabled
Disabled
Disabled
Falling edge
Rising edge
Falling edge
Rising edge
Disabled
Disabled
Disabled
Disabled
Falling edge
Rising edge
Falling edge
Rising edge
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
1
1
1
x
1
1. Always “0” on Port A, B, C, D, E, K, AD0, and AD1.
2. Applicable only on Port P, H, and J.
NOTE
All register bits in this module are completely synchronous to internal
clocks during a register read.
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
107