S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Appendix E Detailed Register Address Map
0x0030–0x0031 Reserved Register Space
0x0030
0x0031
Reserved
Reserved
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
R
W
R
W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0032–0x0033 Port Integration Module (PIM) Map 4 of 6
Address
0x0032
0x0033
Name
PORTK
DDRK
R
W
R
W
Bit 7
PK7
DDRK7
Bit 6
PK6
DDRK6
Bit 5
PK5
DDRK5
Bit 4
PK4
DDRK4
Bit 3
PK3
DDRK3
Bit 2
PK2
DDRK2
Bit 1
PK1
DDRK1
Bit 0
PK0
DDRK0
0x0034–0x003F Clock and Reset Generator (CRG) Map
Address
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039
0x003A
0x003B
0x003C
0x003D
0x003E
0x003F
Name
SYNR
REFDV
POSTDIV
CRGFLG
CRGINT
CLKSEL
PLLCTL
RTICTL
COPCTL
FORBYP
CTCTL
ARMCOP
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
Bit 7
Bit 6
Bit 5
SYNDIV5
REFDIV5
Bit 4
SYNDIV4
REFDIV4
Bit 3
SYNDIV3
REFDIV3
Bit 2
SYNDIV2
REFDIV2
Bit 1
SYNDIV1
REFDIV1
Bit 0
SYNDIV0
REFDIV0
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
LOCK
0
POSTDIV[4:0]]
LOCKIF
LOCKIE
0
ILAF
0
0
PRE
RTR2
RTIF
RTIE
PLLSEL
CME
RTDEC
PORF
0
LVRF
0
XCLKS
SCMIF
SCMIE
RTIWAI
PCE
RTR1
SCM
0
PSTP
PLLON
RTR6
PLLWAI
FSTWKP
RTR3
COPWAI
SCME
RTR0
FM1
RTR5
FM0
RTR4
WCOP
0
0
0
Bit 7
RSBCK
0
0
0
6
0
WRTMASK
0
0
0
5
0
0
CR2
0
0
0
2
CR1
0
0
0
1
CR0
0
0
0
Bit 0
0
0
Reserved For Factory Test
0
Reserved For Factory Test
0
0
4
3
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
1273