S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
25.3.2.9.1
P-Flash Protection Restrictions
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
The general guideline is that P-Flash protection can only be added and not removed.
Table 25-23
specifies
all valid transitions between P-Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored. The contents of the FPROT register reflect the active protection scenario.
See the FPHS and FPLS bit descriptions for additional restrictions.
Table 25-23. P-Flash Protection Scenario Transitions
From
Protection
Scenario
0
1
2
3
4
5
6
X
X
To Protection Scenario
(1)
0
X
1
X
X
X
2
X
3
X
X
X
X
X
X
X
X
X
X
X
X
4
5
6
7
X
X
X
X
X
X
X
X
7
1. Allowed transitions marked with X, see
Figure 25-14
for a definition of the scenarios.
25.3.2.10 EEE Protection Register (EPROT)
The EPROT register defines which buffer RAM EEE partition areas are protected against writes.
Offset Module Base + 0x0009
7
6
5
4
3
2
1
0
R
EPOPEN
W
Reset
F
F
RNV[6:4]
EPDIS
F
F
F
F
EPS[2:0]
F
F
= Unimplemented or Reserved
Figure 25-15. EEE Protection Register (EPROT)
All bits in the EPROT register are readable and writable except for RNV[6:4] which are only readable. The
EPOPEN and EPDIS bits can only be written to the protected state. The EPS bits can be written anytime
until the EPDIS bit is cleared. If the EPOPEN bit is cleared, the state of the EPDIS and EPS bits is
irrelevant.
During the reset sequence, the EPROT register is loaded from the EEE protection byte in the Flash
configuration field at global address 0x7F_FF0D located in P-Flash memory (see
Table 25-3)
as indicated
by reset condition F in
Figure 25-15.
To change the EEE protection that will be loaded during the reset
sequence, the P-Flash sector containing the EEE protection byte must be unprotected, then the EEE
protection byte must be programmed. If a double bit fault is detected while reading the P-Flash phrase
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
915
