S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 10 XGATE (S12XGATEV3)
Operation
Attempts to set a semaphore. The state of the semaphore will be stored in the Carry-Flag:
1 = Semaphore is locked by the RISC core
0 = Semaphore is locked by the S12X_CPU
In monadic address mode, bits RS[2:0] select the semaphore to be set.
CCR Effects
N
Z
V
C
—
N:
Z:
V:
C:
—
—
∆
Not affected.
Not affected.
Not affected.
Set if semaphore is locked by the RISC core; cleared otherwise.
Code and CPU Cycles
Source Form
SSEM #IMM3
SSEM RS
Address
Mode
IMM3
MON
0
0
0
0
0
0
0
0
0
0
Machine Code
IMM3
RS
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
1
Cycles
PA
PA
MC9S12XE-Family Reference Manual , Rev. 1.19
448
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
SSEM
Set Semaphore
SSEM