S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 10 XGATE (S12XGATEV3)
Table 10-24. Instruction Set Summary (Sheet 3 of 3)
Functionality
Arithmetic Immediate Instructions
SUBL RD, #IMM8
SUBH RD, #IMM8
CMPL RS, #IMM8
CPCH RS, #IMM8
ADDL RD, #IMM8
ADDH RD, #IMM8
LDL RD, #IMM8
LDH RD, #IMM8
15
1
1
1
1
1
1
1
1
14
1
1
1
1
1
1
1
1
13
0
0
0
0
1
1
1
1
12
0
0
1
1
0
0
1
1
11
0
1
0
1
0
1
0
1
10
9
RD
RD
RS
RS
RD
RD
RD
RD
8
7
6
5
4
3
2
1
0
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
10.9
10.9.1
Initialization and Application Information
Initialization
The recommended initialization of the XGATE is as follows:
1. Clear the XGE bit to suppress any incoming service requests.
2. Make sure that no thread is running on the XGATE. This can be done in several ways:
a) Poll the XGCHID register until it reads $00. Also poll XGDBG and XGSWEF to make sure
that the XGATE has not been stopped.
b) Enter Debug Mode by setting the XGDBG bit. Clear the XGCHID register. Clear the XGDBG
bit.
The recommended method is a).
3. Set the XGVBR register to the lowest address of the XGATE vector space.
4. Clear all Channel ID flags.
5. Copy XGATE vectors and code into the RAM.
6. Initialize the S12X_INT module.
7. Enable the XGATE by setting the XGE bit.
The following code example implements the XGATE initialization sequence.
10.9.2
Code Example (Transmit "Hello World!" on SCI)
CPU S12X
;###########################################
;#
SYMBOLS
#
;###########################################
EQU $00C8
;SCI register space
EQU SCI_REGS+$00;
;SCI Baud Rate Register
EQU SCI_REGS+$00
;SCI Baud Rate Register
EQU SCI_REGS+$03
;SCI Control Register 2
EQU SCI_REGS+$04
;SCI Status Register 1
EQU SCI_REGS+$07
;SCI Control Register 2
EQU $80
;TIE bit mask
EQU $08
;TE bit mask
EQU $04
;RE bit mask
SCI_REGS
SCIBDH
SCIBDL
SCICR2
SCISR1
SCIDRL
TIE
TE
RE
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
461
