S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 10 XGATE (S12XGATEV3)
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
R
W
Reset
0
47
46
0
45
0
44
0
43
0
42
0
41
0
40
0
39
0
38
0
37
0
36
0
35
0
34
0
33
0
32
0
R
W
Reset
XGIF_2F XGIF_2E XGIF_2D XGIF_2C XGIF_2B XGIF_2A XGIF_29 XGIF_28 XGF _27 XGIF_26 XGIF_25 XGIF_24 XGIF_23 XGIF_22 XGIF_21 XGIF_20
0
31
0
30
0
29
0
28
0
27
0
26
0
25
0
24
0
23
0
22
0
21
0
20
0
19
0
18
0
17
0
16
R
W
Reset
XGIF_1F XGIF_1E XGIF_1D XGIF_1C XGIF_1B XGIF_1A XGIF_19 XGIF_18 XGF _17 XGIF_16 XGIF_15 XGIF_14 XGIF_13 XGIF_12 XGIF_11 XGIF_10
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
R
W
Reset
XGIF_0F XGIF_0E XGIF_0D
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-10. XGATE Channel Interrupt Flag Vector (XGIF) (continued)
Read: Anytime
Write: Anytime
Table 10-10. XGIV Field Descriptions
Field
127–9
XGIF[78:9]
Description
Channel Interrupt Flags
— These bits signal pending channel interrupts. They can only be set by the RISC
core (see SIF instruction
on page 10-447).
Each flag can be cleared by writing a "1" to its bit location.
Unimplemented interrupt flags will always read "0". Section “Interrupts” of the
device overview
for a list of
implemented Interrupts.
Read:
0 Channel interrupt is not pending
1 Channel interrupt is pending if XGIE is set
Write:
0 No effect
1 Clears the interrupt flag
MC9S12XE-Family Reference Manual , Rev. 1.19
364
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
XGIF_3F XGIF_3E XGIF_3D XGIF_3C XGIF_3B XGIF_3A XGIF_39 XGIF_38 XGF _37 XGIF_36 XGIF_35 XGIF_34 XGIF_33 XGIF_32 XGIF_31 XGIF_30
