S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
Table 14-27. Delay Counter Select when PRNT = 0 (continued)
DLY1
0
1
1
DLY0
1
0
1
Delay
256 bus clock cycles
512 bus clock cycles
1024 bus clock cycles
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Table 14-28. Delay Counter Select Examples when PRNT = 1
DLY7
0
0
0
0
0
0
0
0
0
0
0
0
1
DLY6
0
0
0
0
0
0
0
0
0
0
0
1
1
DLY5
0
0
0
0
0
0
0
0
0
0
1
1
1
DLY4
0
0
0
0
0
0
0
0
0
1
1
1
1
DLY3
0
0
0
0
0
0
0
0
1
1
1
1
1
DLY2
0
0
0
0
1
1
1
1
1
1
1
1
1
DLY1
0
0
1
1
0
0
1
1
1
1
1
1
1
DLY0
0
1
0
1
0
1
0
1
1
1
1
1
1
Delay
Disabled (bypassed)
8 bus clock cycles
12 bus clock cycles
16 bus clock cycles
20 bus clock cycles
24 bus clock cycles
28 bus clock cycles
32 bus clock cycles
64 bus clock cycles
128 bus clock cycles
256 bus clock cycles
512 bus clock cycles
1024 bus clock cycles
14.3.2.23 Input Control Overwrite Register (ICOVW)
Module Base + 0x002A
7
6
5
4
3
2
1
0
R
W
Reset
NOVW7
0
NOVW6
0
NOVW5
0
NOVW4
0
NOVW3
0
NOVW2
0
NOVW1
0
NOVW0
0
Figure 14-45. Input Control Overwrite Register (ICOVW)
Read: Anytime
Write: Anytime
All bits reset to zero.
MC9S12XE-Family Reference Manual , Rev. 1.19
552
Freescale Semiconductor