S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
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The D-Flash user partition will start at global address 0x10_0000. The buffer RAM EEE partition will end
at global address 0x13_FFFF. After the Full Partition D-Flash operation has completed, the CCIF flag will
set.
Running the Full Partition D-Flash command a second time will result in the previous partition values and
the entire D-Flash memory being erased. The data value written corresponds to the number of 256 byte
sectors allocated for either direct D-Flash access (DFPART) or buffer RAM EEE access (ERPART).
Table 28-64. Full Partition D-Flash Command Error Handling
Register
Error Bit
Error Condition
Set if CCOBIX[2:0] != 010 at command launch
Set if a Load Data Field command sequence is currently active
ACCERR
Set if command not available in current mode (see
Table 28-30)
FSTAT
FPVIOL
MGSTAT1
MGSTAT0
FERSTAT
EPVIOLIF
Set if an invalid DFPART or ERPART selection is supplied
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
None
28.4.2.16 Erase Verify D-Flash Section Command
The Erase Verify D-Flash Section command will verify that a section of code in the D-Flash user partition
is erased. The Erase Verify D-Flash Section command defines the starting point of the data to be verified
and the number of words.
MC9S12XE-Family Reference Manual , Rev. 1.19
Freescale Semiconductor
1127
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
— ERPART <= 16 (maximum number of 256 byte sectors in buffer RAM)
— If ERPART > 0, 128 - DFPART >= 12 (minimum number of 256 byte sectors in the D-Flash
block required to support EEE)
— If ERPART > 0, ((128-DFPART)/ERPART) >= 8 (minimum ratio of D-Flash EEE space to
buffer RAM EEE space to support EEE)
Erase the D-Flash block and the EEE nonvolatile information register
Program DFPART to the EEE nonvolatile information register at global address 0x12_0000 (see
Table 28-7)
Table 28-7)
Program ERPART to the EEE nonvolatile information register at global address 0x12_0004 (see
Table 28-7)
Program a duplicate ERPART to the EEE nonvolatile information register at global address
Table 28-7)
