S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 27 512 KByte Flash Module (S12XFTM512K3V1)
1. Preferred SEC state to set MCU to secured state.
27.3.2.3
Flash CCOB Index Register (FCCOBIX)
The FCCOBIX register is used to index the FCCOB register for Flash memory operations.
Offset Module Base + 0x0002
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
CCOBIX[2:0]
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 27-7. FCCOB Index Register (FCCOBIX)
CCOBIX bits are readable and writable while remaining bits read 0 and are not writable.
Table 27-13. FCCOBIX Field Descriptions
Field
2–0
CCOBIX[1:0]
Description
Common Command Register Index—
The CCOBIX bits are used to select which word of the FCCOB register
array is being read or written to. See
Section 27.3.2.11, “Flash Common Command Object Register (FCCOB),”
for more details.
27.3.2.4
Flash ECCR Index Register (FECCRIX)
The FECCRIX register is used to index the FECCR register for ECC fault reporting.
Offset Module Base + 0x0003
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
ECCRIX[2:0]
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 27-8. FECCR Index Register (FECCRIX)
ECCRIX bits are readable and writable while remaining bits read 0 and are not writable.
Table 27-14. FECCRIX Field Descriptions
Field
Description
2-0
ECC Error Register Index—
The ECCRIX bits are used to select which word of the FECCR register array is
ECCRIX[2:0] being read. See
Section 27.3.2.13, “Flash ECC Error Results Register (FECCR),”
for more details.
MC9S12XE-Family Reference Manual , Rev. 1.19
1030
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
The security function in the Flash module is described in
Section 27.5.
