S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
Table A-6. Thermal Package Characteristics (9S12XEQ512)
1
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Num
C
Rating
LQFP144
1a
1b
2a
2b
3
4
5
D
D
D
D
D
D
D
Thermal resistance single sided PCB, natural convection
Thermal resistance single sided PCB @ 200 ft/min
Thermal resistance double sided PCB
with 2 internal planes, natural convection
Thermal resistance double sided PCB
with 2 internal planes @ 200 ft/min
Junction to Board LQFP 144
Junction to Case LQFP 144
2
Junction to Package Top LQFP144
3
LQFP112
6a
6b
7a
7b
8
9
10
D
D
D
D
D
D
D
Thermal resistance single sided PCB, natural convection
Thermal resistance single sided PCB @ 200 ft/min
Thermal resistance double sided PCB
with 2 internal planes, natural convection
Thermal resistance double sided PCB
with 2 internal planes @ 200 ft/min
Junction to Board LQFP112
Junction to Case LQFP112
2
Junction to Package Top LQFP112
3
QFP80
11a
11b
12a
12b
13
14
15
1
2
Symbol
Min
Typ
Max
Unit
θ
JA
θ
JA
θ
JA
θ
JA
θ
JB
θ
JC
Ψ
JT
θ
JA
θ
JA
θ
JA
θ
JA
θ
JB
θ
JC
Ψ
JT
θ
JA
θ
JA
θ
JA
θ
JA
θ
JB
θ
JC
Ψ
JT
—
—
—
—
—
—
—
—
—
—
—
—
—
—
49
40
40
34
28
9
2
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
—
—
—
—
—
—
—
—
—
—
—
—
—
—
50
40
40
34
28
9
2
D
D
D
D
D
D
D
Thermal resistance single sided PCB, natural convection
Thermal resistance single sided PCB @ 200 ft/min
Thermal resistance double sided PCB
with 2 internal planes, natural convection
Thermal resistance double sided PCB
with 2 internal planes @ 200 ft/min
Junction to Board QFP 80
Junction to Case QFP 80
2
Junction to Package Top QFP 80
3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
50
40
37
31
23
13
3
3
The values for thermal resistance are achieved by package simulations for the 9S12XEQ512 die.
Junction to case thermal resistance was simulated to be equivalent to the measured values using the cold plate technique
with the cold plate temperature used as the “case” temperature. This basic cold plate measurement technique is described
by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when the
package is being used with a heat sink.
Thermal characterization parameter
Ψ
JT
is the “resistance” from junction to reference point thermocouple on top center of the
case as defined in JESD51-2.
Ψ
JT
is a useful value to use to estimate junction temperature in a steady state customer
enviroment.
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
1209
