S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
28.4.3
Interrupts
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
The Flash module can generate an interrupt when a Flash command operation has completed or when a
Flash command operation has detected an EEE error or an ECC fault.
Table 28-79. Flash Interrupt Sources
Interrupt Source
Flash Command Complete
Flash EEE Erase Error
Flash EEE Program Error
Flash EEE Protection Violation
Flash EEE Error Type 1 Violation
Flash EEE Error Type 0 Violation
ECC Double Bit Fault on Flash Read
ECC Single Bit Fault on Flash Read
Interrupt Flag
CCIF
(FSTAT register)
ERSERIF
(FERSTAT register)
PGMERIF
(FERSTAT register)
EPVIOLIF
(FERSTAT register)
ERSVIF1
(FERSTAT register)
ERSVIF0
(FERSTAT register)
DFDIF
(FERSTAT register)
SFDIF
(FERSTAT register)
Local Enable
CCIE
(FCNFG register)
ERSERIE
(FERCNFG register)
PGMERIE
(FERCNFG register)
EPVIOLIE
(FERCNFG register)
ERSVIE1
(FERCNFG register)
ERSVIE0
(FERCNFG register)
DFDIE
(FERCNFG register)
SFDIE
(FERCNFG register)
Global (CCR)
Mask
I Bit
I Bit
I Bit
I Bit
I Bit
I Bit
I Bit
I Bit
NOTE
Vector addresses and their relative interrupt priority are determined at the
MCU level.
28.4.3.1
Description of Flash Interrupt Operation
The Flash module uses the CCIF flag in combination with the CCIE interrupt enable bit to generate the
Flash command interrupt request. The Flash module uses the ERSEIF, PGMEIF, EPVIOLIF, ERSVIF1,
ERSVIF0, DFDIF and SFDIF flags in combination with the ERSEIE, PGMEIE, EPVIOLIE, ERSVIE1,
ERSVIE0, DFDIE and SFDIE interrupt enable bits to generate the Flash error interrupt request. For a
detailed description of the register bits involved, refer to
Section 28.3.2.5, “Flash Configuration Register
(FCNFG)”, Section 28.3.2.6, “Flash Error Configuration Register (FERCNFG)”, Section 28.3.2.7, “Flash
Status Register (FSTAT)”,
and
Section 28.3.2.8, “Flash Error Status Register (FERSTAT)”.
MC9S12XE-Family Reference Manual , Rev. 1.19
1134
Freescale Semiconductor
