S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 27 512 KByte Flash Module (S12XFTM512K3V1)
Table 27-19. FPROT Field Descriptions
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Field
7
FPOPEN
Description
Flash Protection Operation Enable
— The FPOPEN bit determines the protection function for program or
erase operations as shown in
Table 27-20
for the P-Flash block.
0 When FPOPEN is clear, the FPHDIS and FPLDIS bits define unprotected address ranges as specified by the
corresponding FPHS and FPLS bits
1 When FPOPEN is set, the FPHDIS and FPLDIS bits enable protection for the address range specified by the
corresponding FPHS and FPLS bits
Reserved Nonvolatile Bit
— The RNV bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable
— The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory ending with global address 0x7F_FFFF.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Higher Address Size
— The FPHS bits determine the size of the protected/unprotected area
in P-Flash memory as shown inTable
27-21.
The FPHS bits can only be written to while the FPHDIS bit is set.
Flash Protection Lower Address Range Disable
— The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory beginning with global address
0x7F_8000.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
Flash Protection Lower Address Size
— The FPLS bits determine the size of the protected/unprotected area
in P-Flash memory as shown in
Table 27-22.
The FPLS bits can only be written to while the FPLDIS bit is set.
6
RNV[6]
5
FPHDIS
4–3
FPHS[1:0]
2
FPLDIS
1–0
FPLS[1:0]
Table 27-20. P-Flash Protection Function
FPOPEN
1
1
1
1
0
0
0
FPHDIS
1
1
0
0
1
1
0
FPLDIS
1
0
1
0
1
0
1
Function
(1)
No P-Flash Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full P-Flash Memory Protected
Unprotected Low Range
Unprotected High Range
0
0
0
Unprotected High and Low Ranges
1. For range sizes, refer to
Table 27-21
and
Table 27-22.
Table 27-21. P-Flash Protection Higher Address Range
FPHS[1:0]
00
01
10
11
Global Address Range
0x7F_F800–0x7F_FFFF
0x7F_F000–0x7F_FFFF
0x7F_E000–0x7F_FFFF
0x7F_C000–0x7F_FFFF
Protected Size
2 Kbytes
4 Kbytes
8 Kbytes
16 Kbytes
MC9S12XE-Family Reference Manual , Rev. 1.19
1036
Freescale Semiconductor
