S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
In
Table A-29
the timing characteristics for slave mode are listed.
Table A-29. SPI Slave Mode Timing Characteristics
Num
1
1
2
3
4
5
6
7
8
9
10
11
12
13
1
C
D
D
D
D
D
D
D
D
D
D
D
D
D
D
Characteristic
SCK frequency
SCK period
Enable lead time
Enable lag time
Clock (SCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time (time to data active)
Slave MISO disable time
Data valid after SCK edge
Data valid after SS fall
Data hold time (outputs)
Rise and fall time inputs
Rise and fall time outputs
Symbol
f
sck
t
sck
t
lead
t
lag
t
wsck
t
su
t
hi
t
a
t
dis
t
vsck
t
vss
t
ho
t
rfi
t
rfo
Min
DC
4
4
4
4
8
8
—
—
—
—
20
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
1/4
∞
—
—
—
—
—
20
22
28 + 0.5
⋅
t
bus1
28 + 0.5
⋅
t
bus1
—
8
8
Unit
f
bus
t
bus
t
bus
t
bus
t
bus
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.5 t
bus
added due to internal synchronization delay
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
1245
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages