S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
13.3.2.9
ATD Status Register 2 (ATDSTAT2)
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
This read-only register contains the Conversion Complete Flags CCF[15:0].
Module Base + 0x000A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
0
0
CCF[15:0]
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 13-11. ATD Status Register 2 (ATDSTAT2)
Read: Anytime
Write: Anytime, no effect
Table 13-19. ATDSTAT2 Field Descriptions
Field
15–0
CCF[15:0]
Description
Conversion Complete Flag
n
(n= 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
— A conversion complete
flag is set at the end of each conversion in a sequence. The flags are associated with the conversion position in
a sequence (and also the result register number). Therefore in non-fifo mode, CCF[8] is set when the ninth
conversion in a sequence is complete and the result is available in result register ATDDR8; CCF[9] is set when
the tenth conversion in a sequence is complete and the result is available in ATDDR9, and so forth.
If automatic compare of conversion results is enabled (CMPE[n]=1 in ATDCMPE), the conversion complete flag
is only set if comparison with ATDDRn is true and if ACMPIE=1 a compare interrupt will be requested. In this
case, as the ATDDRn result register is used to hold the compare value, the result will not be stored there at the
end of the conversion but is lost.
A flag CCF[n] is cleared when one of the following occurs:
A) Write to ATDCTL5 (a new conversion sequence is started)
B) If AFFC=0, write “1” to CCF[n]
C) If AFFC=1 and CMPE[n]=0, read of result register ATDDRn
D) If AFFC=1 and CMPE[n]=1, write to result register ATDDRn
In case of a concurrent set and clear on CCF[n]: The clearing by method A) will overwrite the set. The clearing
by methods B) or C) or D) will be overwritten by the set.
0 Conversion number
n
not completed or successfully compared
1 If (CMPE[n]=0): Conversion number
n
has completed. Result is ready in ATDDRn.
If (CMPE[n]=1): Compare for conversion result number
n
with compare value in ATDDRn, using compare
operator CMPGT[n] is true. (No result available in ATDDRn)
MC9S12XE-Family Reference Manual , Rev. 1.19
518
Freescale Semiconductor
