S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
A.6.3
A.6.3.1
Phase Locked Loop
Jitter Information
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
With each transition of the clock f
cmp
, the deviation from the reference clock f
ref
is measured and input
voltage to the VCO is adjusted accordingly.The adjustment is done continuously with no abrupt changes
in the clock output frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in
Figure A-5.
0
1
2
3
N-1
N
t
min1
t
nom
t
max1
t
minN
t
maxN
Figure A-5. Jitter Definitions
The relative deviation of t
nom
is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
MC9S12XE-Family Reference Manual , Rev. 1.19
1238
Freescale Semiconductor