S912XEG128J2VAL
Model | S912XEG128J2VAL |
Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
PDF file | Total 1327 pages (File size: 7M) |
Chip Manufacturer | ROCHESTER |
Appendix A Electrical Characteristics
In
Figure A-8
the timing diagram for master mode with transmission format CPHA=1 is depicted.
(Output)
1
2
SCK
(CPOL = 0)
(Output)
4
SCK
(CPOL = 1)
(Output)
5
MISO
(Input)
9
MOSI
(Output)
Port Data
Master MSB OUT2
6
Bit MSB-1. . . 1
11
Bit MSB-1. . . 1
Master LSB OUT
Port Data
LSB IN
MSB IN2
4
12
13
12
13
3
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
1.If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1,bit 2... MSB.
Figure A-8. SPI Master Timing (CPHA = 1)
MC9S12XE-Family Reference Manual , Rev. 1.19
1242
Freescale Semiconductor