S912XEG128J2VAL
| Model | S912XEG128J2VAL |
| Description | IC,MICROCONTROLLER,16-BIT,CPU12 CPU,CMOS,QFP,112PIN,PLASTIC |
| PDF file | Total 1327 pages (File size: 7M) |
| Chip Manufacturer | ROCHESTER |
Chapter 2 Port Integration Module (S12XEP100PIMV1)
2.3.48
Port P Reduced Drive Register (RDRP)
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages
Access: User read/write
(1)
6
5
4
3
2
1
0
Address 0x025B
7
R
RDRP7
W
Reset
0
0
0
0
0
0
0
0
RDRP6
RDRP5
RDRP4
RDRP3
RDRP2
RDRP1
RDRP0
Figure 2-46. Port P Reduced Drive Register (RDRP)
1. Read: Anytime.
Write: Anytime.
Table 2-44. RDRP Register Field Descriptions
Field
7-0
RDRP
Description
Port P reduced drive—Select
reduced drive for outputs
This register configures the drive strength of output pins 7 through 0 as either full or reduced. If a pin is used as input
this bit has no effect.
1 Reduced drive selected (approx. 1/5 of the full drive strength).
0 Full drive strength enabled.
2.3.49
Port P Pull Device Enable Register (PERP)
Access: User read/write
(1)
6
5
4
3
2
1
0
Address 0x025C
7
R
PPSP7
W
Reset
0
0
0
0
0
0
0
0
PPSP6
PPSP5
PPSP4
PPSP3
PPSP2
PPSP1
PPSP0
Figure 2-47. Port P Pull Device Enable Register (PERP)
1. Read: Anytime.
Write: Anytime.
Table 2-45. PERP Register Field Descriptions
Field
7-0
PERP
Description
Port P pull device enable—Enable
pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
MC9S12XE-Family Reference Manual , Rev. 1.19
140
Freescale Semiconductor
